The PCB mills in Peralta have certain capabilities, so PCBs must be designed with their limitations in mind. The full specs of the machines can be found here: https://peraltastudios.engineering.asu.edu/pcb-mill-specs/
For custom footprint through holes and vias, it is best to use the ASUVIA pad. A tutorial to do this can be found here
The ASUVIA padstack should be installed in C:\\Cadence\\SPB_17.4-silent\\share\\pcb\\pcb_lib\\symbols\
.
The constraints manager can be used to set design restrictions for boards while designing as well as for existing boards. To access the constraints manager in the PCB Editor, either go to Setup --> Constraints --> Constraints Manager
or click on the “CM” icon on the top toolbar.
Figure |
To import the constraints for the Peralta PCB mills, open the constraints manager and go to File --> Import --> Constraints
. Then, select the preferred constraints file (ending in .dcfx). A difference analysis will pop up, it can be closed. Your PCB editor is now configured to automatically restrict traces to the Peralta recommended values.
Figure |
This section is an overview of how the imported constraints were chosen. The constraints manager has three main sections that are required to be manufacturable. The only sections of interest are the Physical, Spacing, and Same Net Spacing sections. All other sections can remain unmodified. The Physical section controls trace width. Select the “All Layers” option to modify parameters. Minimum line and neck width control trace width, which should have a 15 mil minimum. Vias should be ASUVIA by default.
Graphical user interface, application, table, Excel Description automatically generated |
The spacing and same net spacing control the distance between holes, pads, and traces. Select the “All Layers” option to modify parameters. These should all be 10 mil minimum.
Figure |
Figure |