Some components have, in addition to their electrical pins, mechanical supports that must be accounted for in the PCB footprint. Otherwise, without mounting holes for these pins to go into, the component will not fit onto the board. This tutorial will demonstrate how to add the mounting holes to the footprint for a THB001P joystick.
There are a number of tutorials available for creating schematics in Cadence. The best tutorials are in videos, as the manuals and online help are poor.
This page lists tutorials for doing circuit simulations in Cadence.
This Cadence walkthrough goes through the process of creating a PSoC® 4 BLE module schematic symbol and PCB footprint.
When calculating the resistance value for your current limiting resistor there are a few variables to consider. First, what is the supply voltage that will be applied to the LED? Second, what is the forward voltage of the LED you chose? Third, what is the amount of current you want to flow through your LED? By answering these questions, you will be able to calculate the value for the resistor. To begin the process, you must know what supply voltage you will be giving the LED. Whether its 12V, 5V, or 3.3V this value is important to the calculation of the resistance. The next piece of information that is needed is the forward voltage for the particular LED that is being used. To find this information you must reference the datasheet for the part. The forward voltage can be found in the Electrical Characteristics section of the datasheet. Shown below is an image of the forward voltage for an Osram LED:
The default diameter of holes in Cadence is 0.3 mm. This is too small for most components to fit through, as well as too small for proper through-plating of vias. According to the Peralta PCB Mill specifications, hole diameters should be at least 0.5 mm (19.7 mil). Therefore, the following settings are recommended:
A via is an electrical interconnection that connects one layer of a PCB to another layer of a PCB. Vias are typically used when two wires need to cross on the same side of a PCB design, but cannot without continuing the trace on a different layer. It is best to minimize the use of vias for boards being manufactured in Peralta to maximize reliability, but sometimes they are necessary in order to complete a design. If you do need a via, the default via padstack in Cadence is too small for the LPKF ProtoMat S63 PCB Mill that we use to manufacture PCBs in PRLTA 109. There are two ways to address this issue:
When creating a custom PCB footprint for a component, it is stored somewhere on your computer. In order for Design Entry CIS to find where a custom footprint is stored and associate it with a schematic component, the library search path must be changed so that Design Entry CIS knows where to look.